Reconfigurable NoC: Mạng trên chip có khả năng tái cấu hình

1.  Introduction

Objective: Investigate and develop a global reconfiguration solution for NoC design, which will be applied for the future NoC-based systems. The proposed reconfiguration solution should be able to resolve the appearance of defects/faults in the system in order to guarantee the correct operation of the system. In addition, the solution should be used to manage effectively network resources as well as power consumption.
Main Contents:
      Content1: Investigate and develop a global reconfiguration solution for NoC design, which will be applied for future NoC based systems.
      Content2: Model and implement the candidate architecture at register-transfer level (RTL) with HDL such as VHDL/Verilog to analyze timing issues of the proposed solution and to evaluate the performance of the reconfigurable NoC.
       Content3: Synthesize and implement the design with a CMOS technology for further analysis and optimization to validate and improve the reconfiguration solution.

 

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